News Release

February 17, 1997

Hitachi Releases HD155101F Single-Chip RF Block Signal-Processing IC for Use with GSM and EGSM Digital Cellular Telephone Standards

- Single-chip system IC achieves miniaturization and reduced costs by increased level of integration, and easily supports GSM and EGSM standards by adopting offset PLL technique -

Hitachi, Ltd. in cooperation with The Technology Partnership PLC has developed the HD155101F, a highly-integrated IC that implements transmission and reception signal processing for the RF block of digital cellular telephones based on the GSM/EGSM standards(*1). Sample shipments will begin in March 1997. HD155101F adopts the offset PLL(*2) technique in the transmission frequency conversion circuit. This allows the chip to reduce Tx noise and means that end products no longer need noise reduction systems or components such as a SAW filter(*3) and duplexer(*4). The HD155101F also incorporates a wide range of circuit design features for GSM/EGSM standards, such as that the AGC gain can be controlled linearly over a dynamic range of -30 to 50 dB with a control voltage in the range 0.15 to 2.3 volts in the receiver circuit. These features make the system design of the GSM/EGSM RF block far easier, and at the same time support system miniaturization and cost reductions.

GSM is a digital cellular telephone system developed and implemented in Europe, and currently is in operation or has been committed to worldwide. With 30 million subscribers, GSM represents a major market. Even further miniaturization and even longer operating times are now desired in portable telephones. To realize these goals, higher component integration densities with reduced mounting areas and reduced cost are required. Since the GSM and EGSM standards use 800 and 900 MHz in the RF block frequencies, they require noise reduction measures for the transmitted signal and a system design that supports efficient delivery of received signals to the baseband block. Thus there is a strong desire for highly integrated ICs that allow easy implementation of the GSM and EGSM standards.

To respond to these needs, Hitachi, in conjunction with the U.K. system consulting company The Technology Partnership, developed the single-chip RF block signal processing IC. The technologies involved were presented in a technical paper at the International Solid-State Circuit Conference (ISSCC '97) , held in February. Hitachi's first single-chip GSM/EGSM RF block signal-processing IC, the HD155101F provides miniaturization and a cost reduction solution for the RF block.

The HD155101F is fabricated in a 0.6-micrometer BiCMOS process and integrates essentially all the RF transmitter and receiver block functions on a single chip. In the receive block, the HD155101F provides the first mixer, the second mixer, an AGC(*5)) amplifier, and a quadrature demodulator circuit. Additionally, by incorporating an active-bias circuit for RF LNA, the IC realizes all the functions of the high-frequency analog block by adding PLL and a few components. In the transmitter block, the HD155101F provides a quadrature modulator circuit, an up-converter circuit that uses an offset PLL, and a divider circuit.

The duplexer and the SAW filter used to remove spurious noise generated in conventional architectures are no longer required, and an offset PLL technique in which the VCO output can be directly used as the output signal is employed to reduce costs. These allow the HD155101F to suppress Tx noise, and easily comply with the EGSM standard. These techniques also allow applications to dispense with the duplexer and SAW filter that were previously required in the transmitter block, thus eliminating power loss due to filter insertion.

Additionally, due to the fact that the output signal level acquired from the VCO(*6) is always fixed, AM(*7) to PM(*8) conversion distortion and AM to AM conversion distortion, generated by the AM component in the signal from the mixer in earlier systems due to non-linearity in the power amplifier stage do not, in principle, occur with the HD155101F. This means that the HD155101F can meet the GSM specifications easily without depending on the power amplifier linearity.

The HD155101F includes a bias circuit for an external LNA(*9) in the reception system to allow the LNA block to be implemented with a low external component count. This product adopts a double superheterodyne technique in which the RF and IF(*10) local frequencies can be made the same for both reception and transmission, and the first IF frequency is set to 225 MHz. This was done to prepare for later application to the PCN (DCS 1800)(*11) standard and is the result of research into techniques for preventing spurious radiation entering the transmission band. The AGC gain can be controlled linearly over the wide range -30 to 50 dB with a control voltage in the range 0.15 to 2.3 V, and the gain can be set continuously within the range. Also, taking dynamic range into account, by simultaneously controlling antenna attenuation and amplifier gain, the HD155101F achieves a NF of 10.4 dB (typical) at a gain of 50 dB and a compression point(*12) of -17 dB (typical) at a gain of -30 dB.

The HD155101F includes a second-order Butterworth filter in the quadrature demodulator to eliminate signals other than the desired signal, and there is no need to provide such a filter externally. The local signals required for the second mixer, quadrature demodulator, and quadrature modulator are generated by dividing the 540-MHz IF local input signal with a divider circuit. The power saving modes for the reception RF system, the reception IF system, and the transmitter circuits can be controlled from three control signals. The HD155101F can operate at low voltages in the range 2.7 to 3.6 volts. The HD155101F is designed for low-power operation, drawing only 34 mA for reception, 31 mA for transmission, and 1 microampere in power saving mode.

The HD155101F is provided in an LQFP-48 package that supports compact mounting and can contribute to reduced mounting areas. The HD155101F was designed with technological expansion to the PCN standard in mind, and Hitachi and TTP are currently developing ICs with the same package as the HD155101F, for PCN. Hitachi is also considering applying this technology to other systems, including AMPS, CDMA, and PDC systems.

1. GSM: Global system for mobile communications
The 800/900-MHz band digital cellular telephone system used in Europe.
EGSM: Extended global system for mobile communications
Whereas GSM uses 935 to 960 MHz for reception and 890 to 915 MHz for transmission, EGSM uses 925 to 960 MHz for reception and 880 to 915 MHz for transmission.
2. PLL: Phase locked loop
A circuit technology (or a circuit using that technology) in which the circuit is operated at an arbitrary frequency by forming a loop circuit that synchronizes the frequency phase.
3. SAW filter: Surface acoustic wave filter
A filter that uses surface elastic waves that are transmitted across the surface of a piezoelectric material. This implements a filter that has the resonant frequency and its vicinity as the pass band.
4. Duplexer
A signal separating filter. Incorporates two filters, one for the reception frequency and one for the transmission frequency, and separates those signals. There are also duplexers that include a switch.
5. AGC: Automatic gain control
6. VCO: Voltage controlled oscillator
An oscillator in which the output frequency varies according to an input control voltage.
7. AM: Amplitude modulation
8. PM: Phase modulation
9. LNA: Low noise amplifier
10. IF: Intermediate frequency
To increase sensitivity and selectivity, superheterodyne radio receivers first convert the input frequency to a fixed frequency and then apply the internal processing to that fixed frequency. The intermediate frequency is the frequency used for this internal signal processing.
11. PCN: Personal communication network
This standard corresponds to a high-frequency version of the GSM standard.
12. Compression point
The point where saturation occurs and increases in the output level cease as the circuit input level is increased. Normally defined as the point where the response is 1 dB lower than the ideal linear I/O response.


1. Offset PLL technique adopted in the transmission block
The use of this technique means that the duplexer and SAW filter previously used to suppress Tx noise in the transmission block are no longer required. This circuit technology can also easily support the EGSM standard. AM to AM conversion distortion does not, in principle, occur and the HD155101F can meet the GSM specifications easily without depending on the power amplifier or VCO.

2. Integrates most of the high-frequency signal-processing block in a single chip
The HD155101F implements the GSM/EGSM RF block transmission and reception signal processing functionality in a single chip. This design concept of easy implementation of the GSM/EGSM standard supports miniaturization and cost reduction in the high-frequency signal-processing block.

3. Linear control of the AGC amplifier
The AGC gain can be controlled linearly over the dynamic range of -30 to 50 dB with a control voltage in the range 0.15 to 2.3 volts, and the gain can be set continuously in this range.

4. Built-in bias circuit for RF LNA
The HD155101F includes a bias circuit for an external LNA in the reception system to allow the LNA block to be implemented with a low external component counts.

Application Product Examples:

  • Digital cellular telephone systems (including GSM)
  • All types of mobile communication systems
  • Pricing in Japan
    Catalog No. Sample Price
    HD155101F 1,200 yen
    Item Specification
    Operating voltage range 2.7 V to 3.6 V
    Operating temperature range -20 to +75 degrees centigrate
    Current drain (at 3 V) Reception: 34 mA (+LNA) typ.
    Transmission: 31 mA typ.
    Power saving mode: 1 microampere max.
    Operating frequencies Reception: 925 to 960 MHz
    Transmission: 880 to 915 MHz
    AGC gain range -30 to 50 dB typ.
    ( in the range 0.15 to 2.3 V)
    Suppression ratio in the transmission circuit Carrier: -40 dBc typ., -33 dBc min
    USB: -40 dBc typ., -33 dBc min
    Tx noise in the RF block at 925 MHz: -157 dBc/Hz typ.
    at 935 MHz: -165 dBc/Hz typ.
    Package LQFP-48

    The Technology Partnership

    The Technology Partnership (TTP) is Europe's award-winning product development and engineering company based near Cambridge, U.K. TTP develops new products, improves existing products and supplies powerful automated manufacturing systems. TTP operates in a wide range of market sectors including pharmaceuticals, novel printing technology, office products and digital mobile phones.

    TTP's Communications Division has worked with over 40 communications companies worldwide. The Division has focused its attention on GSM and its associated standards (PCN and PCS) developing silicon, software and radio designs for a variety of applications: GSM mobiles, test equipment, wireless local loop; as well as undertaking major contract R&D programs and studies.

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    WRITTEN BY Secretary's Office
    All Rights Reserved, Copyright (C) 1997, Hitachi, Ltd.