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June 11, 1997

Hitachi to Release the SH7044F and SH7045F High-Performance 32-Bit RISC Microcontrollers that Feature a Large-Capacity Single-Voltage Power Supply Flash Memory on Chip

- Performance of 33 MIPS Achieved, 256-Kbyte Large-Capacity On-Chip Flash Memory -

Recently, field programmability, which provides easy reloading and adjustment of the microcomputer program in all stages of the product cycle, from development through prototyping, first production, and mass production, has come to be strongly desired for electronic equipment using embedded microcontrollers to support increased program sizes and shorter development times and to allow equipment specifications to be improved and control data to be adjusted. To respond to these needs, Hitachi has developed and is releasing the F-ZTAT(TM)(*1) microcontroller, which includes on-chip flash memory. Last year, in response to needs for large-capacity flash memories and low power, Hitachi released the industry's first single-voltage power supply on-chip flash memory 32-bit RISC microcontrollers, the 20-MIPS SH 7050 series. Hitachi now produces a total of 14 flash memory microcontrollers, including 8, 16, and 32-bit microcontrollers.

The SH7044F and SH7045F are the first microcontrollers in the industry that feature 256 Kbytes of single-voltage power supply flash memory and provide 33 MIPS performance. This allows the majority of code that requires high-speed execution to be stored in the internal flash memory and executed at one cycle per instruction at 33 MIPS. Additionally, these microcontrollers include a 1-Kbyte cache, so that programs stored in external memory can also be executed at one cycle per instruction when cache hits occur. This makes these microcontrollers appropriate for both multimedia equipment, such as in-car navigation systems and digital camcorders, which require the processing of large amounts of composite video and audio data, and high-performance industrial equipment that requires high-speed high-precision servo control. These microcontrollers also include a rich set of built-in peripheral functions, including a DMAC (direct memory access controller), powerful timers, serial I/O, an A/D converter, and functions for directly connecting external memory (either SRAM or DRAM). These microcontrollers support increased performance and further miniaturization of end products.

The flash memory is divided into eight large and small blocks, and in addition to a batch erase function, these microcontrollers support a function that erases only the required block or blocks. The SH7044F and SH7045F are 32-bit internal bus products that provide identical functions. The SH7044F is a 112-pin QFP product with a 16-bit external data bus, and the SH7045F is a 144-pin QFP product with a 32- bit external data bus. Both products are available in versions with different operating voltage/operating frequency characteristics, in particular 5-V products that operate at 33 MHz or 28.7 MHz, and 3.3-V products that operate at 16.7 MHz.

Hitachi has also developed the SH7010 series as compact peripheral function versions of the SH7040 series, and is now releasing the SH 7014, ROM-less version. The SH7010 series is designed for application products such as printers and DVDs that require real-time control at even lower cost by, for example, reducing the number of timer and DMAC channels. The SH7014 can contribute to further miniaturization and cost reductions in end products by providing the high performance of 28.7 MIPS, a 1 Kbyte cache while still providing a rich set of on-chip peripheral functions. Application software can be developed for any of the SH7044F, SH7045F, and SH7040 products using earlier cross-platform development products that have already been released. Hardware support for application development consists of the earlier E7000 emulator, which can be used simply by replacing the pod.

Future developments in the SH7040 series will include ZTAT(*2) versions of the SH7042 and SH7043 128-Kbyte ROM products that are currently in mass production, and improved performance mask ROM versions (33-MHz/33-MIPS versions). Hitachi is also developing mask ROM versions of the SH7044F and SH7045F, and developing on-chip ROM and on-chip flash memory versions of the SH7014.

- Note -

1. F-ZTAT is a trademark of Hitachi, Ltd.
2. ZTAT is a trademark of Hitachi, Ltd.

- Application Product Examples -

1. SH7044F and SH7045F

[Industrial/Automotive]
In-car navigation systems, motor control, electric cars, factory automation, sequencers, NC systems

[Consumer products]
Digital still cameras, digital camcorders, multi-function TV, multimedia equipment

[Information processing and office automation equipment]
FAX units, Digital PPCs, printers, hard disk drives

2. SH7014

[Consumer products]
Multimedia equipment

[Information processing and office automation equipment]
Printers, DVDs, FAX units, Digital PPCs

- Pricing in Japan -

SH7044F and SH7045F

Catalog No.		Operating voltage	Operating frequency	Sample price (yen)
SH7044F	HD64F7044F33	5 V	33 MHz	6,500
	HD64F7044F28	5 V	28.7 MHz	6,000
	HD64F7044VF16	3.3 V	16.7 MHz	6,500
SH7045F	HD64F7045F33	5 V	33 MHz	7,000
	HD64F7045F28	5 V	28.7 MHz	6,500
	HD64F7045VF16	3.3 V	16.7 MHz	7,000

SH7014

Catalog No.		Operating voltage	Operating frequency	Sample price (yen)
SH7014	HD6417014F28	5 V	28.7 MHz	1,700
	HD6417014VF16	3.3 V	16.7 MHz	1,800

- Development Environment -

The following software and hardware is available.
- Software: Cross-platform C compiler, cross assembler, cross-platform simulator and debugger
- Hardware: Real-time emulator (E7000)

- Specifications -

SH7044F and SH7045F

Item	Specification
	SH7044F (HD64F7044)	SH7045F (HD64F7045)
Power-supply voltage	5 V +/- 0.5 V	3.3 V +/- 0.3 V
Operating frequency	33 MHz/28.7 MHz	16.7 MHz
Processing speed	33 MIPS/28.7 MIPS	16.7 MIPS
CPU core	SH-2: A 32-bit Hitachi-original RISC core
Number of CPU instructions	62 instructions (All instructions are 16-bit fixed-length instructions.)
DSP functions	32 bits x 32 bits x 64 bits: 2 to 4 cycles 32 bits x 32 bits + 64 bits x 64 bits: 2 to 4 cycles 16 bits x 16 bits x 32 bits: 1 to 3 cycles 16 bits x 16 bits + 64 bits x 64 bits: 2 to 3 cycles
On-chip flash memory	256-Kbyte F-ZTAT version (32 bits can be accessed in a single clock cycle.) Erase and write supported from a single-voltage power supply.
On-chip RAM	4 Kbytes (32 bits can be accessed in a single clock cycle.)
On-chip cache	1-Kbyte instruction cache (direct mapped) Two kilobytes of the on-chip RAM is used for this memory. (One kilobyte is used for the address array, and one kilobyte for the data array.)
External memory	SRAM, DRAM, and other memory types can be connected directly using a bus state controller. Four SRAM areas (4 MB each) and one DRAM area (16 MB) Idle cycles can be inserted to prevent bus collisions. Data bus widths: SH7044F - 16 bits (external), SH7045F - 32 bits (external)
On-chip peripheral functions	Four DMAC channels Data transfer controller (DTC): A 34-channel simplified DMAC Multifunction timer unit (MTU): Five multifunction timers Eight-input 10-bit A/D converter Serial communications interface: Two channels Two compare/match timers Interrupt controller (INTC) User break controller (UBC) Parallel I/O ports Watchdog timer (WDT) Clock oscillator (CPG): Includes a built-in clock-doubling PLL circuit.
Package	SH7044F: 112-pin QFP (0.65-mm lead pitch, 20 x 20 mm) SH7045F: 144-pin QFP (0.5-mm lead pitch, 20 x 20 mm)
Power dissipation	At 5 V/33MHz: 600 mW (typical). At 3.3 V/16.7 MHz: 300 mW (typical).
Process	0.6-micrometer 2-layer metal CMOS process

SH7014

Item	Specification
Power-supply voltage	5 V +/- 0.5 V	3.3 V +/- 0.3 V
Operating frequency	28.7 MHz	16.7 MHz
Processing speed	28.7 MIPS/28.7 MHz	16.7 MIPS/16.7 MHz
CPU core	SH-2: A 32-bit Hitachi-original RISC core
Number of CPU instructions	62 instructions (All instructions are 16-bit fixed-length instructions.)
DSP functions	32 bits x 32 bits x 64 bits: 2 to 4 cycles 32 bits x 32 bits + 64 bits x 64 bits: 2 to 4 cycles 16 bits x 16 bits x 32 bits: 1 to 3 cycles 16 bits x 16 bits + 64 bits x 64 bits: 2 to 3 cycles
On-chip RAM	3 Kbytes (32 bits can be accessed in a single clock cycle.)
On-chip cache	1-Kbyte instruction cache (direct mapped) Two kilobytes of the on-chip RAM is used for this memory. (One kilobyte is used for the address array, and one kilobyte for the data array.)
External memory	SRAM, DRAM, and other memory types can be connected directly using a bus state controller. Four SRAM areas (4 MB each) and one DRAM area (16 MB) Idle cycles can be inserted to prevent bus collisions. Data bus width: 16 bits (external)
On-chip peripheral functions	Two DMAC channels Multifunction timer unit (MTU): Three multifunction timers Eight-input 10-bit A/D converter Serial communications interface: Two channels Two compare/match timers Interrupt controller (INTC) Parallel I/O ports Watchdog timer (WDT) Clock oscillator (CPG): Includes a built-in clock-doubling PLL circuit.
Package	112-pin QFP (0.65-mm lead pitch, 20 x 20 mm)
Power dissipation	At 5 V/28.7 MHZ: 400 mW (typical). At 3.3 V/16.7 MHz: 150 mW (typical).
Process	0.6-micrometer 2-layer metal CMOS process

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