November 10, 1997
Hitachi Releases the SH-4 SH7750 Series, Offering Industry's Highest Performance of 360 MIPS for an Embedded RISC Processor, as Top-End Series in SuperH Family
- High-performance engine with On-chip 1.4 GFLOPS graphics performance, designed for the full-fledged multimedia age -
Since the launch of Hitachi's SuperH RISC engine family in 1992 as the industry's first single-chip RISC microcontrollers, the lineup has expanded to include 21 products with five different CPU cores: the SH-1, SH-2, SH- 3, SH-3E, and SH-DSP. Featuring high performance together with low power consumption, and the efficiency of 16-bit fixed-length instructions, these products are used in a wide range of application areas, including the information, OA, industrial, and consumer fields. The number of design wins to date exceeds 2,000. In addition, the SH-3 (SH7700 series), featuring support for the Windows CE operating system released by Microsoft last year, has become widely used as the main engine in multimedia products.
The coming full-fledged multimedia society will see the release of a variety of high-performance, multipurpose devices combining image, voice, communication, and other functions. Examples of such products are car navigation systems equipped with communication and voice recognition functions, and set-top boxes with two-way communication capability. To achieve compact size and low cost, products of this kind will require software implementation of image, communication, and other functions previously handled by dedicated hardware, and greater ease of use through the introduction of voice recognition and speech synthesis. And the embedded processors used in these products will have to provide higher performance and functionality. In response to these market needs, Hitachi has developed the SH-4 SH7750 series, offering 360 MIPS performance and 1.4 GFLOPS graphics processing capability.
The SH7750 series employs a 0.25 micrometer process and a superscalar system to achieve the industry's highest performance for an embedded processor of 360 MIPS at 200 MHz. This series also incorporates floating-point functions(*4), achieving a peak floating-point operation performance of 1.4 GFLOPS at 200 MHz. This performance, a seven-fold improvement over the 200 MFLOPS of the current SH7718R with on-chip floating- point functions, enables the creation of images comprising approximately 5 million polygons. Single-precision and double-precision floating-point operations are supported, and an on-chip coprocessor unit handles a maximum 4 x 4 floating-point data matrix to boost graphics performance. 128-bit computational processing capability supports 2-D and 3-D graphics, enabling more user-friendly, realistic images to be created. The floating-point functions conform to the IEEE-754 specifications(*5).
The cache memory comprises an 8-kbyte instruction cache and 16-kbyte data cache. In addition to the RAM, SRAM, DRAM, synchronous DRAM, and PCMCIA memory interfaces provided in current microcomputers, this new series also offers support for 4-bank 64-Mbit synchronous DRAM and 64-bit data bus. These make it possible to achieve data transfer speeds of 800 Mbytes per second, peak. The memory management unit (MMU) of the SH7750 is designed to run with protected mode operating systems. In addition to the current x2, x3, and x4 frequency multiplier for the CPU clock, x6 and x8 frequency multiplier are also provided. The packages used are a 208-pin HQFP for the 167 MHz version and a 256-pin BGA (ball grid array) for the 200 MHz version. The SH7750 series is upward-compatible with current SuperH microprocessors, allowing newly designed systems to make use of existing software resources. Future plans for the SH-4 series include products for portable information devices. In the SuperH family, there are plans for the SH-5, with a target performance of 1000 MIPS.
1. SuperH: SuperH is a trademark of Hitachi, Ltd.
<Application Product Examples>
AS development support, Hitachi provides software, and an "E10" emulator, incorporating serial interface conforming to JTAG interface standard.
<Pricing in Japan>
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