Hitachi, Ltd. (TSE: 6501) today announced the HD644601BP PCI bus bridge LSI with an on-
chip synchronous DRAM (SDRAM) controller, as a peripheral LSI chip-set for use in 
combination with a Hitachi SH-4 Series RISC processor, for network devices and multimedia 
products that use a PCI bus*1. Sample shipments will begin in July 1999 in Japan.

The PCI bus is widely used as a high-performance standard bus for personal computers, but with 
the recent fall in the price of LSIs with a built-in PCI interface, this bus is also becoming a 
standard in the embedded systems field.

Hitachi's SH-4 Series comprises the top-end models in Hitachi's SuperH? RISC engine family*2 
of RISC microcomputers for embedded systems, using a superscalar system which allows 
simultaneous execution of a number of instructions, and offering a maximum performance of 360 
MIPS at 200 MHz frequency.   The SH-4 Series also supports floating-point operations, offering 
a major improvement in image processing and similar digital signal processing performance.  
Known for their low power consumption and their excellent code efficiency resulting from the 
use of 16-bit fixed-length instructions, these microcomputers are used in such devices as 
handheld PCs installed with Windows(R) CE*3.

However, as we approach the advent of the multimedia age, in addition to high-speed processing 
on a par with personal computers, the need to embedded systems  is also to support for Ethernet, 
IEEE1394, and similar peripheral interfaces and so on.  With this in mind, Hitachi has developed 
the HD644601BP providing support for the PCI bus, which can be used by a wide variety of 
personal computer peripheral devices, and also incorporating an SDRAM controller.

The HD644601BP can be directly connected to the external bus (100 MHz maximum operating 
frequency, 32-bit width) of the  SH-4 series (SH7750) without external circuit, enabling fast 
access from the SH7750.  The HD644601BP's on-chip PCI interface conforms to the PCI Rev. 
2.1 standard, allowing easy connection of a 32-bit, 66 MHz/33 MHz PCI device to an SH7750 
via the external bus.  The SDRAM interface allows connection of a maximum 64 Mbytes of 
SDRAM with an operating frequency of up to 100 MHz, and the on-chip SDRAM controller 
permits the use of SDRAM as shared memory accessible by both the SH7750 and the PCI device.  
In addition, data transfer is possible between the connected SDRAM and PCI bus even when the 
SH7750's external bus is being used by another device.

Used the package is a 256-pin plastic BGA.

Use of an SH7750 and HD644601BP in kit form will simplify the implementation of a system 
with an SH-4 Series core in such fields as network devices, amusement machines, and control 
equipment.

Notes:	1.	PCI (Peripheral Component Interconnect): A bus standard formulated by the PCI  
                Special Interest Group, currently standardized on 33 MHz and 66 MHz bus clock 
                rates.
	2.	SuperH(TM): SuperH is a trademark of Hitachi, Ltd.
	3. 	Windows(R): Windows is a registered trademark of Microsoft Corporation in the      
            	USA and other countries.

< Applications >
Information and OA product fields:
	Network devices, printers, scanners, copiers
Industrial field:
	Measurement and analysis equipment, control equipment
Consumer field:
	Multimedia devices, game machines and other amusement machines

< Specifications >
Item				Specifications                                      
CPU interface			SH-4 MPX-SRAM interface, max. 100 MHz, 32-bit       
SDRAM interface			Max. 100 MHz, 32-bit, max. SDRAM capacity: 64 Mbytes
PCI interface			Conforming to PCI Rev. 2.1, 66 MHz or 33 MHz, 32-bit
Power supply voltage		3.3 V                                               
Package				256-pin BGA                                         

< Prices in Japan > (For Reference Only)
Product Code		Sample Price (Yen)
HD644601BP		4,200