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June 28, 1999

Hitachi releases 256-Mbit synchronous DRAMs and 1-GB synchronous DRAM module which support PC133

- Achieved large capacity and low power consumption for High end systems -

Hitachi, Ltd.(TSE:6501) today announced the release of three 256-Mbit synchronous DRAMs 
(SDRAMs). The HM5225405BTT series (with a 4-bit organization), the HM5225805BTT 
series (with an 8-bit organization), and the HM5225165BTT series (with a 16-bit 
organization), are designed for use as main memory in servers and workstations.  Sample 
shipments will begin in August 1999 in Japan.  These SDRAMs support 133MHz memory 
bus systems (PC133), and reduce about 55% the power consumption of four of Hitachi's 64-
Mbit SDRAMs.

Hitachi also announced the release of two memory modules based on these SDRAMs. The 
HB52RF1289E2 series is the industry's highest density 1-GB 168-pin DIMM, and has a 72-
bit organization with resister. The HB52F649E1 series is a 512-MB 168-pin DIMM, and has 
a 72-bit organization with resister. These two DIMMs also support 133MHz memory bus 
systems(PC133).

One aspect of the recent increased performance of workstations, servers, and other 
information-processing equipment has been an increase in the density of memory. 

So Hitachi has developed the three 256-Mbit SDRAMs and 1-GB/ 512-MB DIMMs which 
support PC133. By using a 0.18-um CMOS fabrication process, the HM5225405BTT series, 
the HM5225805BTT series, and the HM5225165BTT series achieve 256-Mbit large capacity 
and high speed operation. 

These new products reduce the burst current (Icc4) of 280mA in the case of four 64-Mbit 
SDRAMs supporting for PC133 to 130mA. These products are 54-pin 400-mil TSOP-II 
package, as the 64-Mbit SDRAM.

The 1-GB and 512-MB memory modules also being released use these SDRAMs and 168-pin 
DIMMs that support 133-MHz memory bus systems. Hitachi realizes high density 1-GB 
SDRAM module by using Hitachi stacked TCP mounting technology in which TCP packages 
are stacked in two layers.

The 1-GB DIMM has a 128-Mword x 72-bit (2 banks) organization to support ECC*. This 
module uses thirty-six of the HM5225405BTB(TCP) 4-bit organization SDRAM chips on the 
printed circuit board. The 512-MB DIMM has a 64-Mword x 72-bit (1 bank) organization to 
support ECC. This module uses eighteen of the HM5225405BTT(TSOP) 4-bit organization 
SDRAM chips on the printed circuit board.

Note * ECC (error checking and correction): Functions that both check for errors that occur in 
memory data and correct those errors.

<Application Product Examples>
Main memory in servers, workstations, and other computer systems (133-MHz memory bus 
systems)

<Sample pricing in Japan (Yen)>
256-Mbit Synchronous DRAM
Catalog No.		Organization			Sample price(yen)
HM5225405BTT-75		16M x 4 bits x 4 banks		24,000           
HM5225805BTT-75		8M x 8 bits x 4 banks		24,000           
HM5225165BTT-75		4M x 16 bits x 4 banks		24,000           

1-Gbyte/ 512-Mbyte DIMM
Catalog No.		Organization		Sample price(yen)
HB52RF1289E2-75B	128M x 72bit		1,000,000        
HB52F649E1-75B		64M x 72bit		440,000          

<Specifications>
1. 256-Mbit Synchronous DRAM
Item			HM5225405BTT-75		HM5225805BTT-75		HM5225165BTT-75     
Memory			16 Mword x 4 bits x 4	8 Mwords x 8 bits x 	4 Mwords x 16 bits x
organization		banks			8 Mwords x 8 bits x 	4 banks             
External power-		3.3 V +/- 0.3 V		3.3 V +/- 0.3 V		3.3 V +/- 0.3 V
supply voltage                                                                              
High-speed modes	Programmable burst lengths (2, 4, 8)                                
Memory bus 		133 MHz			133 MHz			133 MHz
frequency	                                                                            
Access time (tAC)	5.4ns(CL=3)		5.4ns(CL=3)		5.4ns(CL=3)         
Process			0.18-um CMOS 		0.18-um CMOS 		0.18-um CMOS 
			process			process			process             
Package			54-pin 400-mil TSOP-	54-pin 400-mil		54-pin 400-mil 
			II			TSOP-II			TSOP-II             
 

2. 1-Gbyte/ 512-Mbyte DIMM
Item			HB52RF1289E2-75B		HB52F649E1-75B             
Memory organization	128 Mwords x 72 bits		64 Mwords x 72 bits        
Bank Organization	2 banks				1 bank                     
External power-supply 	3.3V +/- 0.3V			3.3V +/- 0.3V
voltage                                                                            
Mounted SDRAM 		16M x 4 x 4			16M x 4 x 4
specification		36 SDRAMs (TCP)			18 SDRAMs (TSOP)          
Memory bus frequency	133MHz				133MHz                     
CAS latency		CL=3				CL=3                       
Package			168-pin DIMM (Dual In-line 	168-pin DIMM (Dual In-line 
			Memory Module)			Memory Module)
			133.37mm x 38.1 x 4.80mm	133.37mm x 43.18 x 4.00mm  
Buffer			PLL+Resister type		PLL+Resister type          


WRITTEN BY Secretary's Office
All Rights Reserved, Copyright (C) 1999, Hitachi, Ltd.