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News Releases from Headquarters

October 30, 2000
Hitachi Releases SH7729R with SH3-DSP Core and
SH7709S with SH-3 Core, Offering up to 200 MHz Operation
- High-speed processing of VoIP and similar middleware achieved
by high performance of 260 MIPS at 200 MHz
operating frequency and on-chip DSP -
#
Hitachi, Ltd. (TSE: 6501) today announced the SH7729R and SH7709S, with an operating 
frequency of 167 MHz/200 MHz, as higher performance models of the SH7729 and SH7709A 
in Hitachi's SuperH™*1 RISC engine family of 32-bit RISC microprocessors.  Sample 
shipments will begin in December 2000 for the 167 MHz versions, and in March 2001 for 
the 200 MHz versions.

The SH7709S achieves low power consumption with an SH-3 as the CPU core, making it 
suitable for use in portable information devices such as H/PCs.  The SH7729R has an 
SH3-DSP as its core, and incorporates a DSP capable of high-speed compression/expansion 
processing of voice and image data, etc., making it ideal for applications such as 
multimedia products with a built-in browser, and network machines such as routers i
ncorporating VoIP.

Since releasing products with an SH-3 core in 1995, Hitachi has concentrated on 
enhancing peripheral functions and raising the operating frequency, and has been 
engaged in the commercial development of an SH3-DSP core incorporating DSP functions 
capable of high-speed processing of voice and image data.  Various products are 
currently available on the market--with the 100/133 MHz SH7709A, incorporating an 
SH-3 core, and SH7729, incorporating an SH3-DSP, as top-end models--and are used 
in portable information devices and network machines, as well as multimedia products 
such as car navigation systems and digital cameras.

However, the recent dramatic improvements in the functions and performance of portable 
information devices and multimedia products has brought a demand for higher-performance 
semiconductor devices for use in such products.

These new products have been developed to meet this market need, offering a processing 
performance of 217/260 MIPS at a 167/200 MHz operating frequency that easily meets the 
demands of applications with high-performance processing requirements.  The SH7729R, in 
particular, with its on-chip DSP,can handle high-speed processing of voice recorder, 
image data, and the like in portable information devices, enabling high-speed execution 
of middleware in products such as voice codecs, of which VoIP is a typical example.  
This model is also capable of simultaneously executing browser display and voice codec 
processing, for instance, in an OS operating environment such as Windows® CE*2, 
which has been difficult with previous products.

The new products have the same peripheral functions as the SH7729 and SH7709A.  As well 
as an MMU (memory management unit)--essential when using an OS that supports memory 
protection or virtual memory--these models feature a comprehensive set of on-chip 
functions that include a DMAC*3, A/D converter, D/A converter, 32-bit timers, realtime 
clock, serial communication interface, and direct interfaces to various kinds of memory, 
including synchronous DRAM.

In addition, the SH7729R has 16-kbyte on-chip RAM for storing the data required for DSP 
processing such as JPEG and ADPCM*4.  At 167/200 MHz operation, an instruction in cache 
memory and two units of data in on-chip RAM can be accessed in one cycle, enabling high-
speed processing to be achieved.On-chip debugging functions (H-UDI and AUD)*5 are also 
included, enabling realtime emulation to be carried out at the maximum operating 
frequency using the E10A PC card emulator development tool.  The packages used are a 
208-pin LQFP and 240-pin CSP for the 167 MHz models, and a 208-pin HQFP for the 200 MHz 
models.  Pin-arrangement of the LQFP-208 for the 167 MHz models is compatible with the 
SH7729 and SH7709A.

Future plans for the SuperH family include higher speeds for the SH-3 and SH3-DSP, 
and the development of ASSP products.

Notes:	
      1.  SuperH is a trademark of Hitachi, Ltd.
      2.  Windows is a registered trademark of Microsoft Corporation in the USA 
          and other countries.     
      3.  DMAC (Direct Memory Access Controller): A function or device that 
          performs control for direct data transfer from memory to memory or 
          between memory and a peripheral device, instead of the CPU.
      4.  ADPCM (Adaptive Differential Pulse Code Modulation): A representative 
          voice data compression/expansion method using differentials.
      5.  On-chip debugging functions (Hitachi-User Debug Interface, Advanced User 
          Debugger): Part of the debugging circuitry previously incorporated in 
          an emulator.  Providing these functions on-chip enables realtime emulation 
          to be carried out at the microcomputer's actual operating frequency during 
          system evaluation, etc.

< Typical Applications >
Information/OA products: Handheld PCs, portable information devices, LBPs, 
multifunctional printers/fax machines, storage devices, wireless LANs, network 
machines, products with built-in VoIP

Consumer applications: Video printers, multimedia products, word processors, 
DSCs, DVCs 

Industrial/automotive applications: Car navigation systems, Measuring equipment, 
FA equipment
< Prices in Japan > (For Reference)
Product NameOperating
Frequency
PackageUnit Price for 10,000 Lot
(Yen)
SH7729RHD6417729RF167167 MHzLQFP-2082,800
HD6417729RBT167CSP-2403,000
HD6417729RHF200200 MHzHQFP-2083,200
SH7709SHD6417709SF167167MHzLQFP-2082,500
HD6417709SBT167CSP-2402,700
HD6417709SHF200200 MHzHQFP-2082,900

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