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Hitachi

Corporate InformationResearch & Development

January 22, 2015

Report from Presenter


Fig. 1 System in Package Structure
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Fig. 2 Proposed Si/Glass Hybrid Interposer
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The IEEE Electrical Design of Advanced Packaging & Systems Symposium 2014 was held in Bangalore, India, from 14th to 16th December 2014. This conference covered electrical design technologies (SI/PI/EMC) for semiconductor packages and semiconducting systems. About 120 researchers from corporations and academies came from areas such as the USA, Europe, Korean, India, and Japan to attend the conference and held active discussions.

A representative of Yokohama Research Laboratory made a presentation entitled "Hybrid Silicon and Glass Interposer for Combined Optical and Memory System-in-Package." The developed technology is about system in package technology to achieve high bandwidth data transfer in printed circuit board for information and communication technology (ICT) systems such as servers and routers.

The bandwidth of ICT systems has doubled every two years and is predicted to reach 10-Tb/s by 2016. To achieve such high performance, data transfer bandwidth between LSIs (such as processor, memory, optical ICs, and so on) must be higher and higher, but it becomes very difficult to achieve high band width due to technical difficulty in increase of package pin account and data transfer rate. As a technology to overcome these problems, system in package technology, which utilizes µm - class micro wiring board that is called as interposer, is getting attention (Fig. 1).

In this study, we devise hybrid interposer that is combined Si and glass interposer, and proposed a combined optical and memory system-in-package structure that was difficult to configured by single Si or glass interposer (Fig. 2). This structure can solve electrical, packaging, and thermal problems by placing each interposer at suitable position by considering each material property (Fig. 3).
urthermore, we have demonstrated excellent high frequency performance of glass interposer part that is used between optical IC and processor (Fig. 4).

This is sufficient to meet bandwidth demands for future ICT systems.


Fig. 3 Comparison of features for Si, Glass, and
hybrid interposer

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Fig. 4 High frequency properties for
Glass interposer TEG

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Abbreviation

SI: Signal Integrity
PI: Power Integrity
EMC: Electro-Magnetic Compatibility

(By UEMATSU Yutaka)

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