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With the widespread presence of fast-access CD-ROM drives, data reliability has become an important issue. PC CD-ROM systems use not only cross-interleave Reed-Solomon code (CIRC) high-level error correction techniques, but also additional error correction codes. Yet with the increase in speed to quad-speed, current systems are not taking full advantage of the performance potential inherent in these error correction methods.
Hitachi has developed a low-cost LSI chip set for quad-speed CD-ROMs that provides high data reliability. This chip set reduces the frequency of retry operations required when data cannot be corrected, thus increasing the effective data transfer rate.