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Micro-CBIC Series with SuperH Microcomputer CPU Core and Peripheral Functions

Satoru Uchida, Semiconductor & Integrated Circuits Division, Hitachi, Ltd.
Fumio Oyamada, Semiconductor & Integrated Circuits Division, Hitachi, Ltd.
Takeshi Maeda, Semiconductor & Integrated Circuits Division, Hitachi, Ltd.

ABSTRACT

The Hitachi 32-bit reduced instruction set computer (RISC) processor (SuperH RISC engine; abbreviated as SH micon) has been generally accepted as the proccro-CBIC) HG72C series with a SH-1 CPU core to provide designers this integrated capability.

Hitachi專 HG72C series supports integration of the SH7032 and SH7034 micon core as ASIC modules. Each core has an SH-1 CPU with peripheral modules such as a timer. Primitive cells are supported for user logic. Analog functions and memory are also provided to designers.

Electronic design automation (EDA) tools such as compilers allows micro-CBIC designs to be generated in a relatively short time.

Hitachi, Ltd. has developed a micro-cell based IC (micro-CBIC) HG72C series with a SH-1 CPU core to provide designers this integrated capability.

Hitachi's HG72C series supports integration of the SH7032 and SH7034 micon core as ASIC modules. Each core has an SH-1 CPU with peripheral modules such as a timer. Primitive cells are supported for user logic. Analog functions and memory are also provided to designers.

Electronic design automation (EDA) tools such as compilers allows micro-CBIC designs to be generated in a relatively short time.


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