| Takashi Tsutsumi | Application Technology Dept., Semiconductor Manufacturing Equipment Sales Div., Semiconductor Equipment Business Gr., |
| Masanori Kadotani | Etching System Design Dept., Kasado Div., Nanotechnology Products Business Gr., |
| Go Saito | Etching Process Design Dept., Kasado Div., Nanotechnology Products Business Gr., |
| Masahito Mori | Advanced Technology Research Dept, Solution LSI Research Lab., Central Research Lab., |
In regard to cutting-edge semiconductor devices, mass production of 65-nm node devices is about to begin, and development aiming beyond the 45-nm node has already started. Along with this trend, demands for advanced miniaturization and precision-improvement techniques are growing, and the needs for handling new materials and establishing production stability are getting stronger. With these circumstances in mind and taking miniaturization, high precision, and high throughput as a base concept, Hitachi High-Technologies Corporation has developed etching systems and processes for handling the post-65-nm node. Aimed at improving the uniformity across a wafer surface during etching of 300-mm-diameter wafers, an etching reactor—with uniformized discharge-gas rate and a mechanism for controlling electrode-temperature difference—was developed. A "resist trimming" technique, which can handle dimensions that surpass the exposure limit of current lithography, was also developed. Moreover, the etching reactor was designed and developed to realize low CoO, namely, improved operability and shorter maintenance downtime, and is targeting silicon-etching systems for handling the post-45-nm node.
| Hitachi High-Technologies | |
| The Hitachi Hyoron (Japanese Only) |
silicon, etching, gate, resist-trimming, reactor