| Hirokazu Koyabu | Product Marketing Dept., Device Manufacturing Systems Business Gr., |
| Yukio Kembo | Design Dept., |
| Sumio Hosaka, Dr. Eng. | Dept. of Electric Engineering, |
To support the coming ubiquitous information society from the bottom up, semiconductor devices must be capable of high-speed processing and low-power consumption. A device structure that satisfies these performance requirements will have to have higher levels of integration as device miniaturization progresses, be capable of high-step-height processing due to multilevel structures, and employ new materials different than those of conventional devices. At the same time, the use of large-area silicon wafers (phi 300 mm) is increasing with the aim of improving productivity and lowering costs. As a consequence, processes such as embedding and the planarization of high step heights have come into use in addition to traditional etching in semiconductor manufacturing. The management of such processes requires high-accuracy measurement of flatness over the entire chip and measurement of process depth in nanometer units, for example. In addition, the conventional method of breaking a wafer to examine its profile is losing favor due to cost considerations as large-diameter wafers come into use. Against this background, the AFM (atomic force microscope) having a resolution of 0.1 nm has been attracting interest as a new type of in-line evaluation equipment that can satisfy the above requirements. Such AFM equipment is already demonstrating its effectiveness in in-line use including operation on a phi 300-wafer line.
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The Hitachi Hyoron (Japanese Only) |
AFM(atomic force microscope), wide area scanning, CMP(chemical-mechanical polishing), steep shape observation, phi 300-wafer
